Colin J. Ihrig - książki, profil autora

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Improving Performance and Reducing Power with Hardware Acceleration - Static Timing Analysis Based Transformations of Combinational Logic in a High Level ASIC Synthesis Flow
Improving Performance and Reducing Power with Hardware Acceleration - Static Timing Analysis Based Transformations of Combinational Logic in a High Level ASIC Synthesis Flow Rodzaj okładki: Inna Czas wysyłki: 7 dni EAN: 9783639106909 dodaj do listy życzeń